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<p class="MsoNormal"><span style="font-size:12.0pt">Dear users of LRZ,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">We are happy to announce that LRZ and PRACE will offer several online training events. There are still some places available.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Please mind that registration is necessary since the details to access the online courses will be provided to registered attendees only.</span></b><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">OpenCL Programming for Intel FPGAs<o:p></o:p></span></b></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Date</span></b><span style="font-size:12.0pt">: Thursday, April 23 15:00 - Friday, April 24, 2020, 19:00<o:p></o:p></span></p>
<p class="MsoNormal"><b><span lang="DE" style="font-size:12.0pt">Webpage</span></b><span lang="DE" style="font-size:12.0pt">:
<a href="https://www.lrz.de/services/compute/courses/2020-04-23_hfpg1s20/">https://www.lrz.de/services/compute/courses/2020-04-23_hfpg1s20/</a><o:p></o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Registration Deadline</span></b><span style="font-size:12.0pt">: April 20, 2020 (extended!)<o:p></o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Lecturer</span></b><span style="font-size:12.0pt">: Marlon Price (Intel)<o:p></o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt"><o:p> </o:p></span></b></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Content</span></b><span style="font-size:12.0pt">:
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">This course offered by Intel in cooperation with LRZ gives a high-level overview of FPGAs, what they are, why they are so important as accelerators, and how they can be programmed using OpenCL. This course
contains both lectures and lab exercises to help gain familiarity with OpenCL Programming for Intel FPGAs.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">PRACE Workshop: HPC code optimisation workshop<o:p></o:p></span></b></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Date</span></b><span style="font-size:12.0pt">: Monday, June 8 - Wednesday, June 10, 2020, 09:00-17:00<o:p></o:p></span></p>
<p class="MsoNormal"><b><span lang="DE" style="font-size:12.0pt">Webpage</span></b><span lang="DE" style="font-size:12.0pt">:
<a href="https://events.prace-ri.eu/event/1003/">https://events.prace-ri.eu/event/1003/</a>
<o:p></o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Registration Deadline: </span>
</b><span style="font-size:12.0pt">May 25, 2020<b><o:p></o:p></b></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Lecturers</span></b><span style="font-size:12.0pt">: Momme Allalen (LRZ), Fabio Baruffa (Intel), Gennady Fedorov (Intel), Mathias Gerald (LRZ), Carla Guillen (LRZ), Michael Steyer (Intel), Igor Vorobtsov
(Intel)<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Content</span></b><span style="font-size:12.0pt">:
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">We will begin with a description of the latest micro-processor architectures and how the developers can efficiently use modern HPC hardware, in particular the vector units via SIMD programming and AVX-512
optimization and the memory hierarchy. The attendees are then conducted along the optimization process by means of hands-on exercises and learn how to enable vectorization using simple pragmas and more effective techniques, like changing data layout and alignment.
The work is guided by the hints from the Intel® compiler reports, and using Intel® Advisor. Besides Intel® Advisor, the participants will also be guided to the use of Intel® VTune™ Amplifier, Intel® Application Performance Snapshot and LIKWID as tools for
investigating and improving the performance of a HPC application. We further cover the Intel® Math Kernel Library (MKL), in order to show how to gain performance through the use of libraries.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">PRACE Course: Introduction to hybrid programming in HPC<o:p></o:p></span></b></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Date</span></b><span style="font-size:12.0pt">: Wednesday, June 17 08:45 - Friday, June 19, 2020 16:00<o:p></o:p></span></p>
<p class="MsoNormal"><b><span lang="DE" style="font-size:12.0pt">Webpage</span></b><span lang="DE" style="font-size:12.0pt">:
<a href="https://events.prace-ri.eu/event/1009/">https://events.prace-ri.eu/event/1009/</a>
<o:p></o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Registration Deadline</span></b><span style="font-size:12.0pt">: June 2, 2020<b><o:p></o:p></b></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Lecturers</span></b><span style="font-size:12.0pt">: Dr. habil. </span><span lang="DE" style="font-size:12.0pt">Georg Hager (RRZE, Uni. Erlangen), Dr. Rolf Rabenseifner (HLRS, Uni. Stuttgart), Dr. Claudia
Blaas-Schenner, Dr. Irene Reichl (VSC Research Center, TU Wien)<o:p></o:p></span></p>
<p class="MsoNormal"><b><span lang="DE" style="font-size:12.0pt"><o:p> </o:p></span></b></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Content</span></b><span style="font-size:12.0pt">:
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">Most HPC systems are clusters of shared memory nodes. To use such systems efficiently both memory consumption and communication time has to be optimized. Therefore, hybrid programming may combine the distributed
memory parallelization on the node interconnect (e.g., with MPI) with the shared memory parallelization inside of each node (e.g., with OpenMP or MPI-3.0 shared memory). This course analyses the strengths and weaknesses of several parallel programming models
on clusters of SMP nodes.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">LRZ has joined forces with VSC Vienna and HLRS Stuttgart and will offer this course online as a replacement for the course originally scheduled in April at LRZ.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoPlainText"><strong><span style="font-size:12.0pt;font-family:"Calibri",sans-serif;font-weight:normal">We also want to inform you about the following 2 MOOCS (Massive Open Online Courses) offered by PRACE:</span></strong><strong><span style="font-family:"Calibri",sans-serif;font-weight:normal"><o:p></o:p></span></strong></p>
<p class="MsoPlainText"><strong><span style="font-size:12.0pt;font-family:"Calibri",sans-serif"><o:p> </o:p></span></strong></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">PRACE MOOC: MPI: A Short Introduction to One-sided Communication<br>
<strong><span style="font-family:"Calibri",sans-serif">Date</span></strong></span></b><span style="font-size:12.0pt">:
</span><span style="font-size:12.0pt;mso-fareast-language:EN-GB">Starting on April 20, 2020</span><span style="font-size:12.0pt"><br>
<strong><span style="font-family:"Calibri",sans-serif">Webpage</span></strong>: </span>
<span lang="DE" style="font-size:12.0pt"><a href="https://www.futurelearn.com/courses/mpi-one-sided"><span lang="EN-GB">https://www.futurelearn.com/courses/mpi-one-sided</span></a></span><o:p></o:p></p>
<p><strong><span style="font-family:"Calibri",sans-serif">Content:</span></strong><span style="font-family:"Calibri",sans-serif"><br>
Learn the details of one-sided communication in MPI programming. Discover the advantages to one-sided communication in parallel programming. Message Passing Interface (MPI) is a key standard for parallel computing architectures. On this course, you’ll learn
the essential concepts of one-sided communication in MPI, as well as the advantages of the MPI communication model.
<br>
You’ll learn the details of how exactly MPI works, as well how to use Remote Memory Access (RMA) routines. Examples, exercises, and tests will be used to help you learn and explore.<o:p></o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">PRACE MOOC: Python in High Performance Computing<br>
<strong><span style="font-family:"Calibri",sans-serif">Date</span></strong></span></b><span style="font-size:12.0pt">:
</span><span style="font-size:12.0pt;mso-fareast-language:EN-GB">Starting on April 27, 2020</span><span style="font-size:12.0pt"><br>
<strong><span style="font-family:"Calibri",sans-serif">Webpage</span></strong>: </span>
<span lang="DE" style="font-size:12.0pt"><a href="https://www.futurelearn.com/courses/python-in-hpc"><span lang="EN-GB">https://www.futurelearn.com/courses/python-in-hpc</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p><strong><span style="font-family:"Calibri",sans-serif">Content</span></strong><span style="font-family:"Calibri",sans-serif">:<br>
The Python programming language is popular in scientific computing because of the benefits it offers for fast code development. The performance of pure Python programs is often suboptimal, but there are ways to make them faster and more efficient.
<br>
On this course, you’ll find out how to identify performance bottlenecks, perform numerical computations efficiently, and extend Python with compiled code. You’ll learn various ways to optimise and parallelise Python programs, particularly in the context of
scientific and high performance computing.<o:p></o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif">For upcoming ONLINE courses by HLRS see
</span><span class="MsoHyperlink"><span style="font-family:"Calibri",sans-serif;mso-fareast-language:EN-US"><a href="https://www.hlrs.de/training/">https://www.hlrs.de/training/</a></span></span><span style="font-family:"Calibri",sans-serif">
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><b><span style="font-size:12.0pt">Information on further HPC courses:
<o:p></o:p></span></b></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<ul style="margin-top:0cm" type="disc">
<li class="MsoNormal" style="mso-list:l0 level1 lfo1"><span style="font-size:12.0pt">by LRZ:
</span><span lang="DE" style="font-size:12.0pt"><a href="http://www.lrz.de/services/compute/courses/"><span lang="EN-GB">http://www.lrz.de/services/compute/courses/</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></li><li class="MsoNormal" style="mso-list:l0 level1 lfo1"><span style="font-size:12.0pt">by the Gauss Centre of Supercomputing (GCS):
</span><span lang="DE" style="font-size:12.0pt"><a href="http://www.gauss-centre.eu/training"><span lang="EN-GB">http://www.gauss-centre.eu/training</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></li><li class="MsoNormal" style="mso-list:l0 level1 lfo1"><span style="font-size:12.0pt">by German Centres (collected by the Gauß-Allianz):
</span><span lang="DE" style="font-size:12.0pt"><a href="https://hpc-calendar.gauss-allianz.de/"><span lang="EN-GB">https://hpc-calendar.gauss-allianz.de/</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></li><li class="MsoNormal" style="mso-list:l0 level1 lfo1"><span style="font-size:12.0pt">by the Partnership for Advanced Computing in Europe (PRACE):
</span><span lang="DE" style="font-size:12.0pt"><a href="http://www.training.prace-ri.eu/"><span lang="EN-GB">http://www.training.prace-ri.eu/</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></li></ul>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p><span style="font-family:"Calibri",sans-serif">Please also forward this announcement to other interested colleagues.<o:p></o:p></span></p>
<p><span lang="DE" style="font-family:"Calibri",sans-serif">Kind regards,<span style="color:black"><br>
</span>Volker Weinberg<span style="color:black"><o:p></o:p></span></span></p>
<p class="MsoNormal"><span lang="DE" style="font-size:12.0pt">--</span><span lang="DE" style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span lang="DE" style="font-size:12.0pt">Dr. Volker Weinberg<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">HPC Training and Education Coordinator<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">email: </span><span lang="DE" style="font-size:12.0pt"><a href="mailto:weinberg@lrz.de"><span lang="EN-GB">weinberg@lrz.de</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">address: Boltzmannstr. 1 - D-85748 Garching bei Muenchen<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">room: E.1.016<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">phone: +49 (89) 35831-8863<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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