<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40">
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<meta name="Generator" content="Microsoft Word 15 (filtered medium)">
<style><!--
/* Font Definitions */
@font-face
{font-family:Wingdings;
panose-1:5 0 0 0 0 0 0 0 0 0;}
@font-face
{font-family:"Cambria Math";
panose-1:2 4 5 3 5 4 6 3 2 4;}
@font-face
{font-family:Calibri;
panose-1:2 15 5 2 2 2 4 3 2 4;}
/* Style Definitions */
p.MsoNormal, li.MsoNormal, div.MsoNormal
{margin:0cm;
margin-bottom:.0001pt;
font-size:11.0pt;
font-family:"Calibri",sans-serif;
mso-fareast-language:EN-US;}
h2
{mso-style-priority:9;
mso-style-link:"Überschrift 2 Zchn";
mso-margin-top-alt:auto;
margin-right:0cm;
mso-margin-bottom-alt:auto;
margin-left:0cm;
font-size:18.0pt;
font-family:"Times New Roman",serif;
font-weight:bold;}
a:link, span.MsoHyperlink
{mso-style-priority:99;
color:#0563C1;
text-decoration:underline;}
a:visited, span.MsoHyperlinkFollowed
{mso-style-priority:99;
color:#954F72;
text-decoration:underline;}
p
{mso-style-priority:99;
mso-margin-top-alt:auto;
margin-right:0cm;
mso-margin-bottom-alt:auto;
margin-left:0cm;
font-size:12.0pt;
font-family:"Times New Roman",serif;}
span.E-MailFormatvorlage17
{mso-style-type:personal-compose;
font-family:"Calibri",sans-serif;
color:windowtext;}
span.berschrift2Zchn
{mso-style-name:"Überschrift 2 Zchn";
mso-style-priority:9;
mso-style-link:"Überschrift 2";
font-family:"Times New Roman",serif;
mso-fareast-language:EN-GB;
font-weight:bold;}
.MsoChpDefault
{mso-style-type:export-only;
mso-fareast-language:EN-US;}
@page WordSection1
{size:612.0pt 792.0pt;
margin:70.85pt 70.85pt 2.0cm 70.85pt;}
div.WordSection1
{page:WordSection1;}
/* List Definitions */
@list l0
{mso-list-id:531965887;
mso-list-template-ids:431790612;}
@list l0:level1
{mso-level-number-format:bullet;
mso-level-text:\F0B7;
mso-level-tab-stop:36.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:Symbol;}
@list l0:level2
{mso-level-number-format:bullet;
mso-level-text:o;
mso-level-tab-stop:72.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:"Courier New";
mso-bidi-font-family:"Times New Roman";}
@list l0:level3
{mso-level-number-format:bullet;
mso-level-text:\F0A7;
mso-level-tab-stop:108.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:Wingdings;}
@list l0:level4
{mso-level-number-format:bullet;
mso-level-text:\F0A7;
mso-level-tab-stop:144.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:Wingdings;}
@list l0:level5
{mso-level-number-format:bullet;
mso-level-text:\F0A7;
mso-level-tab-stop:180.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:Wingdings;}
@list l0:level6
{mso-level-number-format:bullet;
mso-level-text:\F0A7;
mso-level-tab-stop:216.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:Wingdings;}
@list l0:level7
{mso-level-number-format:bullet;
mso-level-text:\F0A7;
mso-level-tab-stop:252.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:Wingdings;}
@list l0:level8
{mso-level-number-format:bullet;
mso-level-text:\F0A7;
mso-level-tab-stop:288.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:Wingdings;}
@list l0:level9
{mso-level-number-format:bullet;
mso-level-text:\F0A7;
mso-level-tab-stop:324.0pt;
mso-level-number-position:left;
text-indent:-18.0pt;
mso-ansi-font-size:10.0pt;
font-family:Wingdings;}
ol
{margin-bottom:0cm;}
ul
{margin-bottom:0cm;}
--></style><!--[if gte mso 9]><xml>
<o:shapedefaults v:ext="edit" spidmax="1026" />
</xml><![endif]--><!--[if gte mso 9]><xml>
<o:shapelayout v:ext="edit">
<o:idmap v:ext="edit" data="1" />
</o:shapelayout></xml><![endif]-->
</head>
<body lang="EN-GB" link="#0563C1" vlink="#954F72">
<div class="WordSection1">
<p class="MsoNormal"><span style="font-size:12.0pt">Dear users of LRZ,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt">we are happy to announce that we have further extended our online training programme in June. There are still some places available!<o:p></o:p></span></p>
<p><strong><span style="font-family:"Calibri",sans-serif">Please mind that registration is necessary since the details to access the online courses will be provided to the registered attendees only.</span></strong><span style="font-family:"Calibri",sans-serif"><o:p></o:p></span></p>
<h2><span style="font-size:14.0pt;font-family:"Calibri",sans-serif">PRACE Workshop: HPC code optimisation workshop<o:p></o:p></span></h2>
<p><b><span style="font-family:"Calibri",sans-serif">Date</span></b><span style="font-family:"Calibri",sans-serif">: Monday, June 8 - Wednesday, June 10, 2020, 10:00-16:00 CEST<br>
<b>Webpage</b>: <a href="https://events.prace-ri.eu/event/1003/">https://events.prace-ri.eu/event/1003/</a><br>
<b>Registration Deadline: </b>June 3, 2020 (extended!)<br>
<b>Lecturers</b>: Momme Allalen (LRZ), Fabio Baruffa (Intel), Gennady Fedorov (Intel), Mathias Gerald (LRZ), Thomas Gruber (RRZE), Carla Guillen (LRZ), Michael Steyer (Intel), Igor Vorobtsov (Intel), Volker Weinberg (LRZ)<o:p></o:p></span></p>
<p><b><span style="font-family:"Calibri",sans-serif">Content</span></b><span style="font-family:"Calibri",sans-serif">:<br>
We will begin with a description of the latest micro-processor architectures and how the developers can efficiently use modern HPC hardware, in particular the vector units via SIMD programming and AVX-512 optimization and the memory hierarchy. The attendees
are then conducted along the optimization process by means of hands-on exercises and learn how to enable vectorization using simple pragmas and more effective techniques, like changing data layout and alignment. The work is guided by the hints from the Intel®
compiler reports, and using Intel® Advisor. Besides Intel® Advisor, the participants will also be guided to the use of Intel® VTune™ Amplifier, Intel® Application Performance Snapshot and LIKWID as tools for investigating and improving the performance of a
HPC application. We further cover the Intel® Math Kernel Library (MKL), in order to show how to gain performance through the use of libraries. The workshop is a PRACE training event organized by LRZ in cooperation with Intel and RRZE.<o:p></o:p></span></p>
<h2 id="top"><span style="font-size:14.0pt;font-family:"Calibri",sans-serif">PRACE Workshop: Deep Learning and GPU programming workshop<o:p></o:p></span></h2>
<p><b><span style="font-family:"Calibri",sans-serif">Date</span></b><span style="font-family:"Calibri",sans-serif">: Monday, June 15 - Thursday, June 18, 2020, 10:00-16:00 CEST<br>
<b>Webpage</b>: <a href="https://events.prace-ri.eu/event/1007/">https://events.prace-ri.eu/event/1007/</a>
<br>
<b>Registration Deadline: </b>June 8, 2020 (extended!)<br>
<b>Lecturers</b>: Dr. Momme Allalen, Dr. Juan Durillo Barrionuevo, Dr. Volker Weinberg (LRZ and NVIDIA University Ambassadors), Georg Zitzlsberger (IT4Innovations and NVIDIA University Ambassador)<o:p></o:p></span></p>
<p><b><span style="font-family:"Calibri",sans-serif">Content</span></b><span style="font-family:"Calibri",sans-serif">:<br>
Learn how to train and deploy a neural network to solve real-world problems, how to generate effective descriptions of content within images and video clips, how to effectively parallelize training of deep neural networks on Multi-GPUs and how to accelerate
your applications with CUDA C/C++ and OpenACC. This 4-days workshop combines lectures about fundamentals of Deep Learning for Multiple Data Types and Multi-GPUs with lectures about Accelerated Computing with CUDA C/C++ and OpenACC. The lectures are interleaved
with many hands-on sessions using Jupyter Notebooks. The exercises will be done on a fully configured GPU-accelerated workstation in the cloud. The workshop is co-organized by LRZ, IT4Innovations and NVIDIA Deep Learning Institute (DLI) for the Partnership
for Advanced Computing in Europe (PRACE).<o:p></o:p></span></p>
<h2><span style="font-size:14.0pt;font-family:"Calibri",sans-serif">PRACE Course: Introduction to hybrid programming in HPC<o:p></o:p></span></h2>
<p><b><span style="font-family:"Calibri",sans-serif">Date</span></b><span style="font-family:"Calibri",sans-serif">: Wednesday, June 17 08:45 - Friday, June 19, 2020 16:00 CEST<br>
<b>Webpage</b>: <a href="https://events.prace-ri.eu/event/1009/">https://events.prace-ri.eu/event/1009/</a><br>
<b>Registration Deadline</b>: June 2, 2020<br>
<b>Lecturers</b>: Dr. habil. </span><span lang="DE" style="font-family:"Calibri",sans-serif">Georg Hager (RRZE, Uni. Erlangen), Dr. Rolf Rabenseifner (HLRS, Uni. Stuttgart), Dr. Claudia Blaas-Schenner, Dr. Irene Reichl (VSC Research Center, TU Wien)<o:p></o:p></span></p>
<p><b><span style="font-family:"Calibri",sans-serif">Content</span></b><span style="font-family:"Calibri",sans-serif">:<br>
Most HPC systems are clusters of shared memory nodes. To use such systems efficiently both memory consumption and communication time has to be optimized. Therefore, hybrid programming may combine the distributed memory parallelization on the node interconnect
(e.g., with MPI) with the shared memory parallelization inside of each node (e.g., with OpenMP or MPI-3.0 shared memory). This course analyses the strengths and weaknesses of several parallel programming models on clusters of SMP nodes. LRZ has joined forces
with VSC Vienna and HLRS Stuttgart and will offer this course online as a replacement for the course originally scheduled in April at LRZ.<o:p></o:p></span></p>
<h2><span style="font-size:14.0pt;font-family:"Calibri",sans-serif">Intel OneAPI for FPGAs<o:p></o:p></span></h2>
<p><b><span style="font-family:"Calibri",sans-serif">Date</span></b><span style="font-family:"Calibri",sans-serif">: Friday, June 19, 2020, 13:00-19:00 CEST<br>
<b>Webpage</b>: <a href="https://www.lrz.de/services/compute/courses/2020-06-19_hfpg2s20/">
https://www.lrz.de/services/compute/courses/2020-06-19_hfpg2s20/</a><br>
<b>Registration Deadline</b>: June 5, 2020<br>
<b>Lecturer</b>: Susannah Martin (Intel)<o:p></o:p></span></p>
<p><b><span style="font-family:"Calibri",sans-serif">Content</span></b><span style="font-family:"Calibri",sans-serif">:<br>
In this course you will learn to use the Intel® oneAPI Base Toolkit and the Intel® FPGA Add-On for oneAPI Base Toolkit to target an FPGA. We will explore how your Data Parallel C++ (DPC++) source code becomes a custom compute unit, and what resources are utilized
in the FPGA to build it. The proper development flow for working with an FPGA will be presented: emulation, interpreting optimization reports, and performance analysis on the FPGA. Finally, you will be introduced to important optimization concepts such as
pipelining loop iterations and architecting kernel memory. The course includes lectures, demonstrations and hands-on sessions and is offered by Intel in cooperation with LRZ.<o:p></o:p></span></p>
<h2><span style="font-size:14.0pt;font-family:"Calibri",sans-serif">Optimizing OpenCL Programs for Intel FPGAs<o:p></o:p></span></h2>
<p><b><span style="font-family:"Calibri",sans-serif">Date</span></b><span style="font-family:"Calibri",sans-serif">: Thursday, June 25, 2020, 09:00-18:00 CEST<br>
<b>Webpage</b>: <a href="https://www.lrz.de/services/compute/courses/2020-06-25_hfpg3s20/">
https://www.lrz.de/services/compute/courses/2020-06-25_hfpg3s20/ </a><br>
<b>Registration Deadline</b>: June 15, 2020<br>
<b>Lecturer</b>: Marlon Price (Intel)<o:p></o:p></span></p>
<p><b><span style="font-family:"Calibri",sans-serif">Content</span></b><span style="font-family:"Calibri",sans-serif">:<br>
The course covers various optimization techniques to implement high performance OpenCL™ applications on FPGAs. We'll use various debug & analysis tools available in the Intel® FPGA SDK for OpenCL™ software technology to boost performance of OpenCL kernels.
The first half of the lecture focuses on the optimization of single work-item kernels & the utilization of channel constructs & OpenCL kernel pipes. The second half of the lecture focuses on the optimization of NDRange kernels & the effective utilization of
FPGA memory resources. Throughout the lecture we will discuss good coding practices for FPGAs & tool features to improve OpenCL kernel performance on FPGAs. The course is offered by Intel in cooperation with LRZ.<o:p></o:p></span></p>
<h2><span style="font-size:14.0pt;font-family:"Calibri",sans-serif">Information on further HPC courses:
<o:p></o:p></span></h2>
<ul type="disc">
<li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1">
<span style="font-size:12.0pt">by LRZ: </span><span lang="DE" style="font-size:12.0pt"><a href="http://www.lrz.de/services/compute/courses/"><span lang="EN-GB">http://www.lrz.de/services/compute/courses/</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1">
<span style="font-size:12.0pt">by the Gauss Centre of Supercomputing (GCS): </span>
<span lang="DE" style="font-size:12.0pt"><a href="http://www.gauss-centre.eu/training"><span lang="EN-GB">http://www.gauss-centre.eu/training</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1">
<span style="font-size:12.0pt">by German Centres (collected by the Gauß-Allianz):
</span><span lang="DE" style="font-size:12.0pt"><a href="https://hpc-calendar.gauss-allianz.de/"><span lang="EN-GB">https://hpc-calendar.gauss-allianz.de/</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></li><li class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto;mso-list:l0 level1 lfo1">
<span style="font-size:12.0pt">by the Partnership for Advanced Computing in Europe (PRACE):
</span><span lang="DE" style="font-size:12.0pt"><a href="http://www.training.prace-ri.eu/"><span lang="EN-GB">http://www.training.prace-ri.eu/</span></a></span><span style="font-size:12.0pt"><o:p></o:p></span></li></ul>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB">We are looking forward to meeting you online!<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="DE" style="font-size:12.0pt;mso-fareast-language:EN-GB">Kind regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="DE" style="font-size:12.0pt;mso-fareast-language:EN-GB">Volker Weinberg<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="DE" style="font-size:12.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="DE" style="font-size:12.0pt;mso-fareast-language:EN-GB">--<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="DE" style="font-size:12.0pt;mso-fareast-language:EN-GB">Dr. Volker Weinberg<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB">HPC Training and Education Coordinator<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB">Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB">email:
</span><span lang="DE" style="font-size:12.0pt;mso-fareast-language:EN-GB"><a href="mailto:weinberg@lrz.de"><span lang="EN-GB">weinberg@lrz.de</span></a></span><span style="font-size:12.0pt;mso-fareast-language:EN-GB"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB">address: Boltzmannstr. 1 - D-85748 Garching bei Muenchen<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB">room: E.1.016<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;mso-fareast-language:EN-GB">phone: +49 (89) 35831-8863<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
</div>
</body>
</html>