Introduction to SuperMUC - the new Petaflop Supercomputer at LRZ

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Di Jun 26 15:11:31 CEST 2012

Introduction for SuperMUC Users
 You can attend the lectures without registration, also only in parts.
 Date: July 2-5, 2012 10:00 - 17:00
 Location: LRZ Building, University campus Garching, near Munich
 (Lecture room H.E.009)
 This four-day workshop gives an introduction to the usage of the new
 Petaflop class Supercomputer at LRZ, SuperMUC. The first three days of
 this are dedicated to presentations by Intel on their software
 development stack (compilers, tools and libraries); the remaining day
 will be comprised of talks and exercises delivered by IBM and LRZ on
 usage of the IBM-specific aspects of the new system (IBM MPI,
 LoadLeveler, HPC Toolkit) and recommendations on tuning and optimizing
 for the new system.
 The following schedule is preliminary and may undergo changes.
 Monday schedule:
 Introduction to the x86 Westmere and Sandy Bridge Processor
 Usage of Intel Compilers: switches, optimization, profiling, OpenMP,
 advanced features
 Usage of the Intel debugger
 Explicit and compiler-directed vectorization with SSE and AVX
 Tuesday schedule:
 Programming for NUMA
 Intel Cilk Plus
 Fortran standard support and extensions in Intel Fortran
 Intel Inspector XE (correctness checking for memory and threading)
 Threading Building Blocks, OpenCL and other parallel programming models
 Static Security Analysis
 Performance Libraries (MKL, IPP)
 VTune Amplifier XE (performance analysis)
 Wednesday schedule:
 Intel Performance Monitoring Unit (PMU) and other performance analysis
 Intel Cluster Tools Overview and Usage
 Intel Many Integrated Core (MIC) Architecture
 A case study illustrating the use of the Intel toolchain
 Thursday schedule:
 Using LoadLeveler for batch queuing
 IBM's parallel environment
 Performance Tools (High Performance Toolkit, Eclipse User Interface)
 including a demonstration.

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 Ferdinand Jamitzky

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