Plenary session with invited talks on MIC / KNL experience at LRZ

[Weinberg, Volker]

Dear HPC users of LRZ,



We would like to invite you to join the public plenary session of our PRACE Intel MIC programming workshop with several invited talks on MIC experience and best practice recommendations on Wednesday, June  28,  2017, 13:00-18:00 at LRZ Hörsaal, H.E.009 (Lecture Hall).



    Agenda:



·         13:00-13:30 Luigi Iapichino, IPCC at LRZ: "Performance Optimization of Smoothed Particle Hydrodynamics and Experiences on Many-Core Architectures"

·         13:30-14:00 Michael Bader/Carsten Uphoff, IPCC at TUM: "Extreme-scale Multi-physics Simulation of the 2004 Sumatra Earthquake"

·         14:00-14:30 Vit Vondrak/Branislav Jansik, IPCC at IT4I: "Development of Intel Xeon Phi Accelerated Algorithms and Applications at IT4I"

·         14:30-15:00 Michael Klemm, Intel: "Application Show Cases on Intel® Xeon Phi(tm) Processors"

·         15:00-15:30 Coffee Break

·         15:30-16:00 Jan Eitzinger, RRZE: "Evaluation of Intel Xeon Phi "Knights Landing":  Initial impressions and benchmarking results"

·         16:00-16:30 Piotr Korcyl, University of Regensburg: "Lattice Quantum Chromodynamics on the MIC architectures"

·         16:30-17:00 Nils Moschüring, IPP: "The experience of the HLST on Europes biggest KNL cluster"

·         17:00-17:30 Andreas Marek, Max Planck Computing and Data Facility (MPCDF), "Porting  the ELPA library to the KNL architecture"

·         17:30-18:00 Q&A, Wrap-up





More details can be found under https://events.prace-ri.eu/event/609/ .

No registration is needed.

Please also pass this announcement to other interested colleagues.



Kind regards,

Volker Weinberg



--

Dr. Volker Weinberg

Leibniz-Rechenzentrum der Bayerischen Akademie der Wissenschaften

PRACE Advanced Training Centre (PATC) Coordinator



email:   weinberg at lrz.de<mailto:weinberg at lrz.de>

address: Boltzmannstr. 1 - D-85748 Garching bei Muenchen

room:    E.1.016

phone:   +49 (89) 35831-8863




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