Special Lecture: Taming Intel Xeon Processors with OpenMP @ LRZ

[Weinberg, Volker]

Dear HPC users of LRZ,

(Please excuse possible double-postings!)
 
We would like to invite you to attend a special public lecture hosted by LRZ and PRACE, the Partnership for Advanced Computing in Europe. 

Dr. Michael Klemm (Intel Deutschland GmbH) will speak about using OpenMP on recent Intel processors like the latest Intel Xeon Scalable processor, code-named Skylake, which is going to be utilized in the upcoming next-generation high-end supercomputer SuperMUC-NG at LRZ. Please find the event flyer under https://www.lrz.de/services/compute/courses/2018-07-16_hphi1s18/Flyer-Klemm.pdf .

Date:                July 18, 2018
Time:               10:00-12:00
Location:        LRZ, Hörsaal, H.E.009, Boltzmannstraße 1, 85748 Garching near Munich

Title:
Taming Intel Xeon Processors with OpenMP 
 
Abstract:
As today's supercomputers are built out of massively parallel processors, parallel programming for these systems for best parallel performance becomes an important task for today's developers.  One example is the most recent Intel Xeon processor (aka "Skylake"), which employs up to 28 cores with wide 512-bit SIMD instructions.  In this talk, we will review the architecture of the Intel Xeon processor and show how OpenMP can be applied to program for such processors.  Starting from the node-level architecture, we will dive into the micro-architecture of the Intel Xeon processor and provide insights into its performance capabilities.  We will then turn towards the OpenMP programming model.  After a quick recap of traditional OpenMP threading techniques, we will introduce the concepts of modern OpenMP programming with OpenMP tasks, OpenMP SIMD, and how to control memory allocation and affinity.

Biography:
Dr. Michael Klemm is part of the Developer Relations Division at Intel. His focus is on High Performance and Throughput Computing. He received a Doctor of Engineering degree (Dr.-Ing.) in Computer Science from the Friedrich-Alexander-University Erlangen-Nuremberg, Germany.  His areas of interest include compiler construction, design of programming languages, parallel programming, and performance analysis and tuning. Michael is Intel representative in the OpenMP Language Committee and is also the Chief Executive Officer of the OpenMP Architecture Review Board.

This talk will be in English. 

You are cordially invited and we hope that we can welcome you at LRZ for this interesting talk.

Kind regards,
Volker Weinberg

--
Dr. Volker Weinberg 
Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities
- HPC Systems and Services -

email:   weinberg at lrz.de
address: Boltzmannstr. 1 - D-85748 Garching bei Muenchen             
room:    E.1.016
phone:   +49 (89) 35831-8863