From Martin.Major at lrz.de Fri Apr 12 15:10:23 2019 From: Martin.Major at lrz.de (Major, Martin) Date: Fri, 12 Apr 2019 13:10:23 +0000 Subject: LRZ Stellenausschreibungen Message-ID: <35089f767b9b421eaaced94ab314a3bc@lrz.de> Zum nächstmöglichen Zeitpunkt suchen wir eine/n: Mitarbeiter/in (m/w/d) für den Betrieb und das Management von Netzkomponenten Das LRZ betreibt das Münchner Wissenschaftsnetz (MWN) und versorgt damit mehr als 200.000 Endgeräte in Universitäten und Forschungseinrichtungen im Großraum München mit Netzdiensten. Zu dieser Infrastruktur zählen auch rund 2.000 managebare Layer 2 Switches. Für das Management (Konfiguration, Betrieb, Fehlersuche, Monitoring, etc.) dieser Geräte suchen wir eine/n Mitarbeiter/in. Wir sind bestrebt das Management der Switches stärker zu automatisieren. In diesen Bereichen bringen Sie Ihre Expertise ein. Aufgaben: * Betrieb und Management der Switches im Münchner Wissenschaftsnetzes * Weiterentwicklung und Automatisierung der Betriebs- und Managementumgebung * Dokumentation der Infrastruktur Zur Stellenausschreibung . _____ Wir suchen eine Studentische Hilfskraft (m/w/d) - Automatisierung im Software Engineering Das derzeit am Leibniz-Rechenzentrum laufende Forschungsprojekt CoCoReCS beschäftigt sich u.a. mit Fragen der Reproduzierbarkeit von Simulationsergebnissen auf HPC-Plattformen sowie der nachhaltigen Softwareentwicklung. Die praktischen Arbeiten stützen sich sowohl auf Standardtools wie Versionsverwaltung (z.B. gitlab) und Integration (z.B. Travis CI, Jenkins), aber auch spezielleren Tools aus dem Supercomputingbereich (Paketmanager Spack). In einer ersten Phase soll eine moderne, auf den HPC-Bereich abgestimmte Entwicklungspipeline aufgesetzt werden, deren Wirksamkeit anhand einer Testapplikation (SeisSol) überprüft und dokumentiert wird. Diese Ausschreibung wendet sich an engagierte Studierende, welche Interesse an der Gestaltung von automatisierten Build- und Softwarebereitstellungs-Prozessen haben und diese in einer professionellen IT-Landschaft implementieren möchten. Das Forschungsprojekt erlaubt diverse Freiräume und Gestaltungsmöglichkeiten bezüglich der Lösungswege. zur Stellenausschreibung -------------- nächster Teil -------------- Ein Dateianhang mit HTML-Daten wurde abgetrennt... URL: -------------- nächster Teil -------------- Ein Dateianhang mit Binärdaten wurde abgetrennt... Dateiname : smime.p7s Dateityp : application/pkcs7-signature Dateigröße : 7732 bytes Beschreibung: nicht verfügbar URL : From Volker.Weinberg at lrz.de Thu Apr 25 15:48:55 2019 From: Volker.Weinberg at lrz.de (Weinberg, Volker) Date: Thu, 25 Apr 2019 13:48:55 +0000 Subject: PRACE Workshop: HPC code optimisation workshop Message-ID: Dear HPC users of LRZ, There are still some places free for the upcoming PRACE "HPC code optimisation workshop" at LRZ. Date: Monday, May 20 - Wednesday, May 22, 2019, 9:00-17:00 Lecturers: Dr. Fabio Baruffa (Intel), Dr. Mathias Gerald (LRZ), Dr. Luigi Iapichino (LRZ) Further Details and Registration: https://events.prace-ri.eu/event/872/ Registration deadline: 6 May 2019 Location: LRZ Building, University campus Garching near Munich, Germany In the ever-growing complexity of computer architectures, code optimization has become the main route to keep pace with hardware advancements and effectively make use of current and upcoming High Performance Computing systems. Have you ever asked yourself: * Where does the performance of my application lay? * What is the maximum speed-up achievable on the architecture I am using? * Is my implementation matching the HPC objectives? In this workshop, experts from LRZ and Intel will answer these questions and provide a unique opportunity to learn techniques, methods and solutions on how to improve code, how to enable the new hardware features and how to use the roofline model to visualize the potential benefits of an optimization process. We will begin with a description of the latest micro-processor architectures and how the developers can efficiently use modern HPC hardware, in particular the vector units via SIMD programming and AVX-512 optimization and the memory hierarchy. The attendees are then conducted along the optimization process by means of hands-on exercises and learn how to enable vectorization using simple pragmas and more effective techniques, like changing data layout and alignment. The work is guided by the hints from the Intel® compiler reports, and using Intel® Advisor. NEW: this year the workshop will consist of three days. We will dedicate most of the third day to the Intel Math Kernel Library (MKL), in order to show how to gain performance through the use of libraries. We provide also an N-body code, to support the described optimization solutions with practical hands-on. The course is a PRACE training event. Further upcoming courses by LRZ Introduction to Intel FPGA Programming Models Tuesday, May 21, 2019, 09:00-17:00 PRACE Course: Deep Learning and GPU programming workshop Monday, June 3 - Thursday, June 6, 2019, 9:00-17:00 Advanced C++ with Focus on Software Engineering Wednesday, June 12 - Friday, June 14, 2019, 9:00 - 17:00 Deep Learning and GPU programming using OpenACC @ HLRS Stuttgart Monday, July 15 - Wednesday, July 17, 2019, 9:00-17:00 Introduction to ANSYS Fluid Dynamics (CFX, Fluent) on LRZ HPC Systems Monday, September 2 - Friday, September 6, 2019, 09:00-17:00 PRACE Course: Advanced Fortran Topics Monday, September 9 - Friday, September 13, 2019, 9:00-18:00 Compact Course: Iterative Linear Solvers and Parallelization Monday, September 16 08:30 - Friday, September 20, 2019, 15:30 Introduction to Semantic Patching of C programs with Coccinelle Tuesday, October 8, 2019, 10:00 - 17:00 Advanced C++ with Focus on Software Engineering Wednesday, November 20 - Friday, November 22, 2019, 9:00 - 17:00 C++ Language for Beginners Monday, November 25 - Friday, November 29, 2019, 9:00 - 17:00 Information on further HPC courses * by LRZ: http://www.lrz.de/services/compute/courses/ * by the Gauss Centre of Supercomputing (GCS): http://www.gauss-centre.eu/training * by German Centres (collected by the Gauß-Allianz): https://hpc-calendar.gauss-allianz.de/ * by the Partnership for Advanced Computing in Europe (PRACE): http://www.training.prace-ri.eu/ Please also pass this course announcement to other interested colleagues. Kind regards, Volker Weinberg -- Dr. Volker Weinberg Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities - HPC Systems and Services - email: weinberg at lrz.de address: Boltzmannstr. 1 - D-85748 Garching bei Muenchen room: E.1.016 phone: +49 (89) 35831-8863 -------------- nächster Teil -------------- Ein Dateianhang mit HTML-Daten wurde abgetrennt... URL: From Volker.Weinberg at lrz.de Thu Apr 25 18:22:59 2019 From: Volker.Weinberg at lrz.de (Weinberg, Volker) Date: Thu, 25 Apr 2019 16:22:59 +0000 Subject: NEW: Introduction to Intel FPGA Programming Models Message-ID: <19d8aa3c362f4ba2b772f46230bfad15@lrz.de> Dear HPC users of LRZ, We are happy to announce that we will offer a special lecture about "Introduction to Intel FPGA Programming Models" by Bill Jenkins, Sr. Product Line Manager for Artificial Intelligence on FPGAs at Intel. Date: Tuesday, May 21, 2019, 09:00-17:00 Lecturers: Bill Jenkins (Intel) Further Details and Registration: https://www.lrz.de/services/compute/courses/2019-05-21_hfpg1s19/ Registration deadline: 6 May 2019 Location: LRZ Building, University campus Garching, near Munich, Germany FPGAs can help accelerate many of the core data center workloads that process the growing volume of data that our hyper-connected world creates. They can be reprogrammed in a fraction of a second with a datapath that exactly matches your workload's key algorithms. This versatility results in a higher performing, more power efficient, and well utilized data center - lowering your total cost of ownership. FPGAS can be connected directly to processors, memories, networks, and numerous other interfaces. Traditionally, FPGAs require deep domain expertise to program for, but Intel is investing in significantly simplifying the development flow and enable rapid deployment across the data center. This full day course offered by Intel in cooperation with LRZ is a high-level overview of FPGAs with the intention of level setting people on what they are, why they are so important as accelerators, what their programming models are and how easily they can be adopted into compute clusters through the use of the Acceleration Stack for Intel® Xeon® CPU with FPGAs. This course contains both lecture and lab exercises to help gain familiarity with these concepts using the tools available for FPGA developers such as Quartus, Platform Designer, High Level Synthesis, OpenCL, and DSP Builder. At completion you will have learned: * Why FPGA accelerators are so important in solving tomorrows problems * Identify the various programming models for the FPGA * Understand the components of the Acceleration Stack and where to get them and how to use them * Explain the software development model for writing software applications using the OPAE layer to run acceleration workloads on an FPGA accelerator * Where to get or how to create accelerator workloads for Programmable Accelerator Cards (PAC) using the Acceleration Stack for Intel® Xeon® CPU with FPGAs Further upcoming courses by LRZ PRACE Workshop: HPC code optimisation workshop Monday, May 20 - Wednesday, May 22, 2019, 9:00-17:00 PRACE Course: Deep Learning and GPU programming workshop Monday, June 3 - Thursday, June 6, 2019, 9:00-17:00 Advanced C++ with Focus on Software Engineering Wednesday, June 12 - Friday, June 14, 2019, 9:00 - 17:00 Deep Learning and GPU programming using OpenACC @ HLRS Stuttgart Monday, July 15 - Wednesday, July 17, 2019, 9:00-17:00 Introduction to ANSYS Fluid Dynamics (CFX, Fluent) on LRZ HPC Systems Monday, September 2 - Friday, September 6, 2019, 09:00-17:00 PRACE Course: Advanced Fortran Topics Monday, September 9 - Friday, September 13, 2019, 9:00-18:00 Compact Course: Iterative Linear Solvers and Parallelization Monday, September 16 08:30 - Friday, September 20, 2019, 15:30 Introduction to Semantic Patching of C programs with Coccinelle Tuesday, October 8, 2019, 10:00 - 17:00 Advanced C++ with Focus on Software Engineering Wednesday, November 20 - Friday, November 22, 2019, 9:00 - 17:00 C++ Language for Beginners Monday, November 25 - Friday, November 29, 2019, 9:00 - 17:00 Information on further HPC courses * by LRZ: http://www.lrz.de/services/compute/courses/ * by the Gauss Centre of Supercomputing (GCS): http://www.gauss-centre.eu/training * by German Centres (collected by the Gauß-Allianz): https://hpc-calendar.gauss-allianz.de/ * by the Partnership for Advanced Computing in Europe (PRACE): http://www.training.prace-ri.eu/ Please also pass this course announcement to other interested colleagues. Kind regards, Volker Weinberg -- Dr. Volker Weinberg Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities - HPC Systems and Services - email: weinberg at lrz.de address: Boltzmannstr. 1 - D-85748 Garching bei Muenchen room: E.1.016 phone: +49 (89) 35831-8863 -------------- nächster Teil -------------- Ein Dateianhang mit HTML-Daten wurde abgetrennt... URL: