NEW: Introduction to Intel FPGA Programming Models

Weinberg, Volker Volker.Weinberg at
Do Apr 25 18:22:59 CEST 2019

Dear HPC users of LRZ,

We are happy to announce that we will offer a special lecture about "Introduction to Intel FPGA Programming Models" by Bill Jenkins, Sr. Product Line Manager for Artificial Intelligence on FPGAs at Intel.

Date: Tuesday, May 21, 2019, 09:00-17:00
Lecturers: Bill Jenkins (Intel)
Further Details and Registration:
Registration deadline: 6 May 2019
Location: LRZ Building, University campus Garching, near Munich, Germany

FPGAs can help accelerate many of the core data center workloads that process the growing volume of data that our hyper-connected world creates. They can be reprogrammed in a fraction of a second with a datapath that exactly matches your workload's key algorithms. This versatility results in a higher performing, more power efficient, and well utilized data center - lowering your total cost of ownership. FPGAS can be connected directly to processors, memories, networks, and numerous other interfaces. Traditionally, FPGAs require deep domain expertise to program for, but Intel is investing in significantly simplifying the development flow and enable rapid deployment across the data center.

This full day course offered by Intel in cooperation with LRZ is a high-level overview of FPGAs with the intention of level setting people on what they are, why they are so important as accelerators, what their programming models are and how easily they can be adopted into compute clusters through the use of the Acceleration Stack for Intel® Xeon® CPU with FPGAs.  This course contains both lecture and lab exercises to help gain familiarity with these concepts using the tools available for FPGA developers such as Quartus, Platform Designer, High Level Synthesis, OpenCL, and DSP Builder.

At completion you will have learned:

  *   Why FPGA accelerators are so important in solving tomorrows problems
  *   Identify the various programming models for the FPGA
  *   Understand the components of the Acceleration Stack and where to get them and how to use them
  *   Explain the software development model for writing software applications using the OPAE layer to run acceleration workloads on an FPGA accelerator
  *   Where to get or how to create accelerator workloads for Programmable Accelerator Cards (PAC) using the Acceleration Stack for Intel® Xeon® CPU with FPGAs

Further upcoming courses by LRZ

PRACE Workshop: HPC code optimisation workshop<>
Monday, May 20 - Wednesday, May 22, 2019, 9:00-17:00
PRACE Course: Deep Learning and GPU programming workshop<>
Monday, June 3 - Thursday, June 6, 2019, 9:00-17:00
Advanced C++ with Focus on Software Engineering<>
Wednesday, June 12 - Friday, June 14, 2019, 9:00 - 17:00
Deep Learning and GPU programming using OpenACC @ HLRS Stuttgart<>
Monday, July 15 - Wednesday, July 17, 2019, 9:00-17:00
Introduction to ANSYS Fluid Dynamics (CFX, Fluent) on LRZ HPC Systems<>
Monday, September 2 - Friday, September 6, 2019, 09:00-17:00
PRACE Course: Advanced Fortran Topics<>
Monday, September 9 - Friday, September 13, 2019, 9:00-18:00
Compact Course: Iterative Linear Solvers and Parallelization<>
Monday, September 16 08:30 - Friday, September 20, 2019, 15:30
Introduction to Semantic Patching of C programs with Coccinelle<>
Tuesday, October 8, 2019, 10:00 - 17:00
Advanced C++ with Focus on Software Engineering<>
Wednesday, November 20 - Friday, November 22, 2019, 9:00 - 17:00
C++ Language for Beginners<>
Monday, November 25 - Friday, November 29, 2019, 9:00 - 17:00

Information on further HPC courses

  *   by LRZ:
  *   by the Gauss Centre of Supercomputing (GCS):
  *   by German Centres (collected by the Gauß-Allianz):
  *   by the Partnership for Advanced Computing in Europe (PRACE):

Please also pass this course announcement to other interested colleagues.

Kind regards,
Volker Weinberg

Dr. Volker Weinberg
Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities
- HPC Systems and Services -

email:   weinberg at<mailto:weinberg at>
address: Boltzmannstr. 1 - D-85748 Garching bei Muenchen
room:    E.1.016
phone:   +49 (89) 35831-8863

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