Upcoming PRACE Courses at LRZ and new PRACE Best Practice Guides

[Weinberg, Volker]

Dear HPC users of LRZ,



There are still free places for the following upcoming PRACE courses at LRZ:



PRACE Course: Advanced Topics in High Performance Computing

Date: Monday, March 18 - Thursday, March 21, 2019, 9:00-17:00
Location: LRZ
Registration deadline extended until 10 Mar 2019!

Lecturers: R. Bader, S. Mendez, V. Weinberg (LRZ), J. Eitzinger (RRZE), Andrey Semin (Intel)

Topics: Processor-specific optimization, parallel I/O with MPI IO, Tuning I/O on LRZ's HPC systems, I/O profiling: Darshan tool, scientific data libraries: HDF5, scalable I/O library: SIONlib, PGAS programming with coarray Fortran and Unified Parallel C.

We are happy to announce that during the course Andrey Semin (Intel) will give a special lecture about the Intel Xeon Scalable (Skylake) processor architecture. This lecture will be devoted to the Intel Xeon Scalable (codenamed Skylake) processor that powers the brand new LRZ supercomputer: SuperMUC-NG. The lecture will cover details about Skylake core microarchitecture and Xeon uncore design. Additionally, the lecture will provide details about SuperMUC-NG compute node design and the fabric system architecture.



Further information  and registration: https://events.prace-ri.eu/event/822/
<https://events.prace-ri.eu/event/822/>
<https://events.prace-ri.eu/event/822/>
________________________________




PRACE Workshop: HPC code optimisation workshop

Date: Monday, May 20 - Wednesday, May  22, 2019, 9:00-17:00
Location: LRZ
Lecturers: Dr. Fabio Baruffa (Intel), Dr. Mathias Gerald (LRZ), Dr. Luigi Iapichino (LRZ)

Have you ever asked yourself:



·         Where does the performance of my application lay?

·         What is the maximum speed-up achievable on the architecture I am using?

·         Is my implementation matching the HPC objectives?



In this workshop, we will answer these questions and provide a unique opportunity to learn techniques, methods and solutions on how to improve code, how to enable the new hardware features and how to use the roofline model to visualize the potential benefits of an optimization process.



Further information  and registration: https://events.prace-ri.eu/event/872/
<https://events.prace-ri.eu/event/822/>

________________________________



PRACE Course: Deep Learning and GPU programming workshop

Date: Monday, June 3 - Thursday, June 6, 2019, 9:00-17:00
Location: LRZ
Lecturers: Dr. Momme Allalen, Dr. Juan Durillo Barrionuevo, Dr. Yu Wang, Dr. Volker Weinberg (LRZ)

Summary: This new 4-days PRACE workshop offered for the first time at LRZ combines lectures about fundamentals of Deep Learning for Multiple Data Types and Multi-GPUs with lectures about Accelerated Computing with CUDA C/C++ and OpenACC.

The workshop is co-organized by LRZ and NVIDIA Deep Learning Institute<http://www.nvidia.co.uk/dli> (DLI) for the Partnership for Advanced Computing in Europe (PRACE).



Further information: https://events.prace-ri.eu/event/860/



________________________________



We also want to point your attention to the new Best Practice Guides published by the Partnership for Advanced Computing in Europe (PRACE) under the leadership of LRZ under http://www.prace-ri.eu/best-practice-guides/



·         Best Practice Guide - Deep Learning, February 2019 PDF<http://www.prace-ri.eu/IMG/pdf/Best-Practice-Guide-Deep-Learning.pdf> , HTML<http://www.prace-ri.eu/best-practice-guide-deep-learning>

·         Best Practice Guide - Modern Interconnects , February 2019 PDF<http://www.prace-ri.eu/IMG/pdf/Best-Practice-Guide-Modern-Interconnects.pdf> , HTML<http://www.prace-ri.eu/best-practice-guide-modern-interconnects>

·         Best Practice Guide - ARM64, February 2019 PDF<http://www.prace-ri.eu/IMG/pdf/Best-Practice-Guide-ARM64.pdf> , HTML<http://www.prace-ri.eu/best-practice-guide-arm64/>

·         Best Practice Guide - Parallel I/O, February 2019  PDF<http://www.prace-ri.eu/IMG/pdf/Best-Practice-Guide-Parallel-IO.pdf> , HTML<http://www.prace-ri.eu/best-practice-guide-parallel-i-o/>

·         Best Practice Guide - AMD EPYC, February 2019 PDF<http://www.prace-ri.eu/IMG/pdf/Best-Practice-Guide-AMD.pdf> , HTML<http://www.prace-ri.eu/best-practice-guide-amd-epyc>

·         Best Practice Guide - HPC for Data Science on the Cray Urika, January 2019 PDF<http://www.prace-ri.eu/IMG/pdf/Best-Practice-Guide-Data-Science.pdf> , HTML<http://www.prace-ri.eu/best-practice-guide-hpc-for-data-science-on-the-cray-urika/>



Topics for these Best Practice Guides include: a short description of the processor architecture, optimal porting of applications (e.g., choice of numerical libraries and compiler options); architecture specific optimisation and scaling techniques; optimal system environment (e.g., tuneable system parameters, job placement and optimised system libraries); debugging tools, performance analysis tools and programming environment.

________________________________



Information on further HPC courses:



·         by LRZ: http://www.lrz.de/services/compute/courses/

·         by the Gauss Centre of Supercomputing (GCS): http://www.gauss-centre.eu/training

·         by German Centres (collected by the Gauß-Allianz): https://hpc-calendar.gauss-allianz.de/

·         by the Partnership for Advanced Computing in Europe (PRACE): http://www.training.prace-ri.eu/

Please also pass this announcement to other interested colleagues.



Kind regards,

Volker Weinberg



--

Dr. Volker Weinberg

Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities

- HPC Systems and Services -



email:   weinberg at lrz.de<mailto:weinberg at lrz.de>

address: Boltzmannstr. 1 - D-85748 Garching bei Muenchen

room:    E.1.016

phone:   +49 (89) 35831-8863




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